Throughout this disclosure, including in the claims, the expression performing an operation “on” signals or data (e.g., filtering or scaling the signals or data) is used in a broad sense to denote performing the operation directly on the signals or data, or on processed versions of the signals or data (e.g., on versions of the signals that have undergone preliminary filtering or other processing prior to performance of the operation thereon).
In signal processing, a digital biquadratic filter is a second-order recursive linear filter, containing two poles and two zeros. The abbreviation “biquad” (or “bi-quad”) filter will be used herein to denote a digital biquadratic filter. In the Z domain, the transfer function of a biquad filter is the ratio of two quadratic functions:
      H    ⁡          (      z      )        =                    b        0            +                        b          1                ⁢                  z                      -            1                              +                        b          2                ⁢                  z                      -            2                                      1      +                        a          1                ⁢                  z                      -            1                              +                        a          2                ⁢                  z                      -            2                              
High-order recursive filters (infinite impulse response or “IIR” filters of order greater than second order) can be highly sensitive to quantization of their coefficients, and can easily become unstable. First and second-order recursive filters can also have instability problems of this type but the instability problems are much less severe. Therefore, high-order recursive filters are typically implemented as serially cascaded filters comprising a serial cascade of bi-quad sections (and optionally also a first-order filter). Such serially cascaded filters are sometimes referred to herein as multistage biquad filters, and comprise a sequence of bi-quad filters (sometimes referred to herein as bi-quad stages or bi-quad sections).
For example, conventional encoders configured to encode audio data in accordance with the well known AC-3 (Dolby Digital) format, or either of the well known Dolby Digital Plus and Dolby E formats, implement a number of multistage biquad filters. For example, a Dolby Digital Plus encoder typically employs a two-stage biquad filter (i.e., a filter including two cascaded biquad filters) to implement high pass filtering in a transient detector subsystem, a four-stage biquad filter (i.e., a filter including four cascaded biquad filters) to implement low pass filtering in a low frequency effects (“LFE”) subsystem, and a three-stage biquad filter to implement bandwidth limiting low pass filtering. A Dolby E encoder typically employs a two-stage biquad filter (i.e., a filter including two cascaded biquad filters) to implement high pass filtering in a transient detector subsystem, and a four-stage biquad filter (i.e., a filter including four cascaded biquad filters) to implement low pass filtering in a low frequency effects (“LFE”) subsystem. A Dolby E decoder typically employs a three-stage biquad filter (i.e., a filter including three cascaded biquad filters) to implement low pass filtering in a low frequency effects (“LFE”) subsystem.
For example, FIG. 1 is a diagram of a biquad filter (of a type sometimes referred to as Direct Form II-Transposed structure), including elements 1, 2, 3, 4, 5, b0, b1, b2, −a1, and −a2, connected as shown. Elements 1, 2, and 3 are addition elements, elements 4 and 5 are delay elements, and each of gain elements b0, b1, b2, −a1, and −a2 applies a corresponding one of gains b0, b1, b2, −a1, and −a2, to the signal asserted to its input. Although not shown or described herein, it is well known to those skilled in the art that other, equivalent, biquad filter structures exist, for example Direct Form I, Direct Form I-Transposed, and Direct Form II. Any such equivalent biquad filter structures are within the scope of the invention.
As shown in FIG. 1A, if the biquad filter of FIG. 1 (labeled as Biquad 1 in FIG. 1A) is cascaded with a biquad filter having identical structure (labeled as Biquad 2 in FIG. 1A) but whose gain elements may apply different gains than do those of the FIG. 1 filter, the resulting multistage biquad filter is an example of a two-stage biquad filter that can be employed (e.g., to implement high pass filtering in a transient detector subsystem of an audio encoder as mentioned above). In the multistage biquad filter of FIG. 1A, the output signal, x1(n), of the first stage is the input signal to the second stage.
For multistage biquad filters (and some other multistage IIR filters), an output sample calculation in each stage at instant “n” (i.e., the stage's output signal y(n)) in response to values of a time-domain signal x(n) (an input signal or a signal generated in another stage of the multistage filter) at instant “n” and previous instants, has dependency on previous outputs (i.e., the outputs y(n−1) and y(n−2), at instants n−1 and n−2). Also, for each two consecutive stages (biquad filters) in a multistage biquad filter, the output of each earlier stage is input to the subsequent stage, so that the output of subsequent stage cannot be determined until after the output of the earlier stage has been determined. These are main reasons as to why fully parallelized processing has not been employed (before the present invention) to implement a multistage biquad filter.
In many modern day core processor architectures (e.g., digital signal processor architectures) there are SIMD (single instruction, multiple data) units and/or multiple ALUs (arithmetic logic units) or AMUs (arithmetic manipulation units) which can be used to parallelize many algorithms and improve performance. However, conventional algorithms for programming processors to implement multistage biquad filters do not use SIMD instructions and are not parallelized.
For example, Dolby Digital Plus encoders (which encode audio data in accordance with the Dolby Digital Plus format) have been implemented as programmed ARM neon processors (each of which is an ARM Cortex processor with a Neon SIMD engine allowing parallel processing), and as programmed Texas Instruments C64 digital signal processors. Many audio data encoders (e.g., encoders which encode audio data in accordance with the AC-3, Dolby Digital Plus, Dolby E, and/or other encoding formats) have been or could be implemented as programmed processors having any of a variety of architectures, having SIMD (single instruction, multiple data) units and/or multiple ALUs (arithmetic logic units) or AMUs (arithmetic manipulation units). Such processors could be programmed to implement various algorithms (included in the audio data encoding) using parallel processing. However, the conventional programming that has been employed to implement multistage biquad filters in such processors has not implemented parallel processing.
Typical embodiments of the present invention employ parallel processing to implement a multistage biquad filter. Some embodiments employ parallel processing to implement a multistage biquad filter of a type used in encoding audio data in accordance with the AC-3 (Dolby Digital) format, the Dolby Digital Plus format, or the Dolby E format.
Although the invention is not limited to use in encoding audio data in accordance with the AC-3, Dolby Digital Plus, or Dolby E format, some embodiments are audio encoding methods, systems, and processors (e.g., for encoding audio data in accordance with the AC-3, Dolby Digital Plus, or Dolby E format) employing at least one multistage biquad filter implementing (or designed in accordance with) an embodiment of the invention.
An AC-3 encoded bitstream comprises one to six channels of audio content, and metadata indicative of at least one characteristic of the audio content. The audio content is audio data that has been compressed using perceptual audio coding.
Details of AC-3 (also known as Dolby Digital) coding are well known and are set forth in many published references including the following:
ATSC Standard A52/A: Digital Audio Compression Standard (AC-3), Revision A, Advanced Television Systems Committee, 20 Aug. 2001;
Flexible Perceptual Coding for Audio Transmission and Storage,” by Craig C. Todd, et al, 96th Convention of the Audio Engineering Society, Feb. 26, 1994, Preprint 3796;
“Design and Implementation of AC-3 Coders,” by Steve Vernon, IEEE Trans. Consumer Electronics, Vol. 41, No. 3, August 1995;
“Dolby Digital Audio Coding Standards,” book chapter by Robert L. Andersen and Grant A. Davidson in The Digital Signal Processing Handbook, Second Edition, Vijay K. Madisetti, Editor-in-Chief, CRC Press, 2009;
“High Quality, Low-Rate Audio Transform Coding for Transmission and Multimedia Applications,” by Bosi et al, Audio Engineering Society Preprint 3365, 93rd AES Convention, October, 1992; and
U.S. Pat. Nos. 5,583,962; 5,632,005; 5,633,981; 5,727,119; and 6,021,386.
Details of Dolby Digital (AC-3) and Dolby Digital Plus (sometimes referred to as Enhanced AC-3 or “E-AC-3”) coding are set forth in “Introduction to Dolby Digital Plus, an Enhancement to the Dolby Digital Coding System,” AES Convention Paper 6196, 117th AES Convention, Oct. 28, 2004, and in the Dolby Digital/Dolby Digital Plus Specification (ATSC A/52:2010), available at http://www.atsc.org/cms/index.php/standards/published-standards.